PCI-Lite Small Footprint HDL PCI Core
The PciLite™ HDL PCI Core is a streamlined Verilog/VHDL PCI controller optimized for embedded applications. The PciLite™ design implements a core PCI subset that simplifies the user’s local bus interface while retaining high throughput Master/DMA capabilities. The result is a small-footprint, high performance PCI controller that is ideal for most applications. The PciLite™ local bus target interface supports direct connection to user host registers or memory mapped peripherals with optional “ready” handshaking for slow devices. A simplified local bus initiator/master interface supports direct connection to user FIFOs for high throughput master/DMA transactions.
Features
- Supports 32-bit PCI initiator and target transactions
- Target local bus interface supports single-beat writes at 8/16/32-bit bus widths
- Master/DMA local bus interface supports high-speed arbitrary length burst transfers
- Compact modular design that is configurable to minimize gate count for a particular application
- Pipelined design eliminates tedious manual placement and timing optimization in FPGA/ASIC implementations
- Complete with source code and self-checking test bench
- Includes Windows 2000/XP Driver DLL and example "C" language interface software.
To download the PciLite™ product brief, click here
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